Design Tricks, Tips and Horror Stories:

Design of Analogue Systems:

  • Performance Metric Separability:

    • Tip: A key tip for the design of analogue circuits is to allow reasonable independence between some of the circuits main performance metrics. For example, for an amplifier, we may have the amplifier's gain (G), bandwidth (BW), noise figure (NF) and phase margin (Phi). It may not be possible to prevent these parameters from being related, however, circuit topologies can be utilised to try and separate these relationships.

    • Design: In a SONAR system an array of small piezoelectric elements are sampled using an ADC, however, part of the analogue chain for this is a charge sensitive amplifier (CSA) [Link] [Link]. This amplifier has an AC gain that is set by a series input resistor (R1) and an AC feedback capacitor (CF). Often a large >1 MOhm resistor (RF) is placed in parallel with CF in the feedback network to allow the DC gain to be a controlled finite value.

    • Poor Design: In a design "horror story" the PCB implementing this amplifier did not include the input impedance R1. Instead, the input resistance was effectively the series resistance of the piezoelectric element itself. To make matters worse, this was unknown and due to access, it was impractical to measure this series resistance. This meant that while an estimate of R1 could be obtained from the piezoelectric material's datasheet, the value was open to significant estimation error.

    • Task: The task was to change this amplifier's components in order to modify its frequency performance. This can be achieved by changing the CSA's feedback capacitor, remembering that RF mainly sets the DC gain.

    • Problem #1: But... changing this capacitor say from 1pF to 10pF changes the gain, as expected from theory. Normally, we would change R1 to counteract this change, if that is possible, however as there is no R1 on the PCB the value by definition must remain the same as the series resistance of the piezoelectric element. The result then is that we can change the bandwidth, but that we cannot counteract the change in gain.  The loss of gain can be counteracted by increasing the gain of the amplifier between this CSA and the digitizing ADC. 

    • Problem #2: But... by Friss' formula the noise figure of a chain of amplifiers is optimised then the gain is predominantly at the front-end of the chain, i.e. in the first amplifier itself. By lowering the gain of the CSA and compensating it with an increased stage 2 gain, we have sacrificed noise performance.

    • Solution: An ideal solution would be to have complete and independent control over each parameter separately, i.e. separate gain (G) and bandwidth (BW) control. Part of this would be to ensure that R1 was present in the design so that it could be used to counteract the change in gain