MY RESEARCH BLOG:

August 9, 2017

It was tough to write after a few years away from my Ph.D research, but finally my book chapter on "Single-Photon Avalanche Diodes in CMOS for Optical Communications" is now online through InTechOpen, with the print copy soon to be in Edinburgh University Library. It is part of a collection of paper...

March 20, 2017

Introduction:

At the software sustainability institute (www.software.ac.uk), we strive to promote best practices in software development for research. Better Software, Better Research… that’s the motto. But does this need to be restricted to software languages such as C, C++, Python or Java? Or shoul...

December 6, 2016

I've been accepted for this small fellowship, so I now hope to increase the uptake of students that continue with software, and indeed firmware, best-practices within 2017 and beyond. The fellowship is dedicated for outreach with some £3000 available per fellow in 2017. With this I hope to setup a n...

November 18, 2016

At a recent job interview I was asked my preferred clocking approach for designing digital systems. It is the Xilinx best practice to only use the positive edge, single-edge clocking scheme, however in my discussion I expounded the use of dual-edge clocking, i.e. changing data on the positive edge o...

October 26, 2016

I've been invited to submit, hint hint, "Invite to Submit", a chapter for an InTech Open book on "Optical Communications". There are a number of pros and cons to be debated before I decide to do this chapter, not all relating to current work and publishing pressures. 

I have read, and indeed cited a...

October 24, 2016

So coding best practices and quality for maintainability have become strangely close to my heart in recent months after significant amounts of my time being taken up correcting, debugging and sorting out revisions status for various sub-block codes within our firmware designs.

This prompted me to loo...

October 24, 2016

Some time ago I wrote a small blog post on physical constraints for FPGAs (HERE). The idea here was to constrain a block to a finite area of slices or resources in order to promote high-speed design through small routing paths between CLBs, even if this means that clocks must travel a reasonable dis...

September 27, 2016

Burn-Out... 

You read about it on LinkedIn and Forbes but those articles never prepare you for when it actually happens. To be totally honest, I've come within a gnat's whisker of burn out twice within the last six months and it is most certainly not good. 

In this blog post, I want to go through some...

July 4, 2016

In this series of blog posts, I've systematically looked at the literature, physical mechanisms and the nomenclature used within Physics and Engineering for the external and internal photoelectric effect. Contrary to unprofessional and overly critical critique, the internal photoelectric effect is d...

June 28, 2016

In my previous posts on this topic, [Part 1], [Part 2] and [Part 3] ,we have been discussing the nature of the internal photoelectric effect in silicon. It appears that while there is strong agreement on the physical mechanism and indeed the equations that model the experimental facts, there is some...

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Senior Electronics Design Engineer, (Digital)

Coda Octopus Products Ltd.

South Gyle, Edinburgh, Scotland, UK

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Dr Edward M.D. Fisher Ph.D MEng MIEEE MIET