A significant challenge in the FLITES project is that all data acquisition and control must be performed remotely. Over 50m to be exact. In some instances, or in older technologies, this distance would be traversed by amplifying and distributing the analogue signals from the optical sensors. However, given the harsh environment and the sheer cost and power required for robust analogue signal transmission (with fully terminated differential signals), it was felt that a distributed network of Ethernet modules would be most appropriate.
No commercial off the shelf (COTS) system was able to offer us the number of channels, noise and acquisition speed required by the project, (within an academic project's budget), therefore the entire data acquisition system is custom designed.
Traditionally Ethernet is thought of as plug and play technology, however with a custom PCB and custom digital systems, we have needed to bring up the Ethernet standard outselves. The physical layer is rather simple to negotiate, however to interface to modern Ethernet switching gear, and indeed computer Ethernet ports, the entire Ethernet protocol must be brought up to industry standard levels.
In the image above, the digital system is split with the left front-end firmware performing data acquisition, experiment control and custom digital-lock-in signal processing. The right hand side implements an embedded "Microblaze" (tm) processor from Xilinx. This implements a traditional embedded computer on each data acqusition hub PCB. It receives Ethernet command packets, decodes these into actions transmitted to the front-end firmware, grabs the experimental processed data using Direct Memory Access (DMA), and transmits the exerimental data using the Ethernet's UDP protocol.
The entire system is designed for a) experimental reconfiguration and adaptability of settings, b) design for test and c) extension to larger numbers of beams, different modulation schemes and ultimatly different target gas species.
Traditionally with these systems, industry would assign multiple people to the job, however in academia staffing can become complex and problematic. For this work, I've designed the PCB for the FLITES project taking due care when dealing with high speed differential data buses (16 channels all running at 580Mb/s DDR over LVDS). Andrea the project's Ph.D student has developed the digital -lock-in detection signal-processing utilising Xilinx IPcores to increase development speed and robustness. We have also had the oportunity to get two other PhD students onto the project although in a more informal manner. Together the above embedded system is starting to take shape.
It is unfortunate that the embedded design isn't particularly novel as this kind of work is undertaken regularly in industry. However it will likely be the first experimental tomography system that is directly suitable for integration with the host test cell's existing diagnostic systems.
I'll keep you posted...